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Design-Rule-Aware Congestion Model with Explicit Modeling of Vias and Local Pin Access Paths., , и . J. Comput. Sci. Technol., 30 (3): 614-628 (2015)Priority-Based Routing Resource Assignment Considering Crosstalk., , , , и . J. Comput. Sci. Technol., 21 (6): 913-921 (2006)A novel fine-grain track routing approach for routability and crosstalk optimization., , , , , и . ISQED, стр. 621-626. IEEE, (2011)A new splitting graph construction algorithm for SIAR router., , , и . ASICON, стр. 1-4. IEEE, (2013)Leakage power optimization for clock network using dual-Vth technology., , и . ISCAS, стр. 2769-2772. IEEE, (2008)Evaluating a bounded slice-line grid assignment in O(nlogn) time., , , , , , и . ISCAS (4), стр. 708-711. IEEE, (2003)SIAR: splitting-graph-based interactive analog router., , , и . ACM Great Lakes Symposium on VLSI, стр. 367-370. ACM, (2011)Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain., , , и . J. Comput. Sci. Technol., 20 (2): 224-230 (2005)SUALD: Spacing uniformity-aware layout decomposition in triple patterning lithography., , и . ISQED, стр. 566-571. IEEE, (2013)Optimization of via distribution and stacked via in multi-layered P/G networks., , и . Integr., 43 (3): 318-325 (2010)