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Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.

J. Wang, P. Yang, and D. Sheng. IEEE J. Solid State Circuits, 35 (4): 583-592 (2000)

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Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylationL. Wang. Uni Marburg, (2009)

Paul Wang

Other publications of authors with the same name

High-Speed and Low-Power Design Techniques for TCAM Macros.C. Wang, J. Wang, and C. Yeh. IEEE J. Solid State Circuits, 43 (2): 530-540 (2008)Charge-sharing alleviation and detection for CMOS domino circuits.S. Chang, C. Cheng, W. Jone, S. Lee, and J. Wang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (2): 266-280 (2001)A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications.C. Lin, J. Chen, H. Chang, Y. Yang, Y. Ou-Yang, M. Tsai, J. Guo, and J. Wang. IEEE J. Solid State Circuits, 42 (1): 170-182 (2007)Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.J. Wang, P. Yang, and D. Sheng. IEEE J. Solid State Circuits, 35 (4): 583-592 (2000)Low-voltage pulsewidth control loops for SOC applications.P. Yang, and J. Wang. IEEE J. Solid State Circuits, 37 (10): 1348-1351 (2002)Design of Subthreshold SRAMs for Energy-Efficient Quality-Scalable Video Applications.J. Wang, P. Chang, T. Tang, J. Chen, and J. Guo. IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 183-192 (2011)Embedding Repeaters in Silicon IPs for Cross-IP Interconnections.J. Wang, K. Chang, C. Yeh, and S. Chang. IEEE Trans. Very Large Scale Integr. Syst., 21 (3): 597-601 (2013)An All-Digital Delay-Locked Loop Using an In-Time Phase Maintenance Scheme for Low-Jitter Gigahertz Operations.J. Wang, and C. Cheng. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (2): 395-404 (2015)Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET).C. Huang, W. Chen, K. Chang, Y. Ting, K. Hsu, Y. Pan, C. Chen, Y. Chu, T. Lin, and J. Wang. Hot Chips Symposium, page 1. IEEE, (2014)A 16 nm 140 TOPS/W 5 μJ/Inference Keyword Spotting Engine Based on 1D-BCNN.T. Lin, Y. Ting, M. Hsu, K. Lin, C. Huang, F. Tsai, S. Sheu, S. Chang, C. Yeh, and J. Wang. IEEE Trans. Circuits Syst. II Express Briefs, 70 (12): 4564-4568 (December 2023)

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Disambiguation of "Wang, Jinn-Shyan"

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Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.

Please choose a person to relate this publication to

Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Paul Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wang, Jinn-Shyan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.

Please choose a person to relate this publication to

Jing-Shyan Lin

Jinn-Rong Lee

Wang Wang

Linfang Wang

Paul Wang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops.