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Sparse distributed memory using N-of-M codes., , , and . Neural Networks, 17 (10): 1437-1451 (2004)On generating multicast routes for SpiNNaker., , , , and . Conf. Computing Frontiers, page 2:1-2:10. ACM, (2014)On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems., , , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 11 (5): 1133-1147 (2017)SpiNNaker: Enhanced multicast routing., , , , and . Parallel Comput., (2015)spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System., , , , , , , and . IEEE Access, (2020)SPA - A Synthesisable Amulet Core for Smartcard pplications., , , , , and . ASYNC, page 201-210. IEEE Computer Society, (2002)The Design and Evaluation of an Asynchronous Microprocessor., , , , , and . ICCD, page 217-220. IEEE Computer Society, (1994)Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric., , , , , , , , , and 2 other author(s). Parallel Comput., 37 (8): 392-409 (2011)AMULET1: A Asynchronous ARM Microprocessor., , , , , and . IEEE Trans. Computers, 46 (4): 385-398 (1997)Neural Systems Engineering., and . Computational Intelligence: A Compendium, volume 115 of Studies in Computational Intelligence, Springer, (2008)