( en | de | ru )

 

Disambiguation of "Gierkink, Sander L. J."

Author of the publication

copydeleteadd this publication to your clipboard
Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion.

, , , , , and . IEEE J. Solid State Circuits, 37 (8): 1003-1011 (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sander L Gilman

Clemens L J Engel

Walter L J Rosen

Ute L J Pröschel

J L M Wagenvoort

 

Other publications of authors with the same name

A 2.5Gb/s Burst-Mode CDR based on a 1/8th rate Dual Pulse Ring Oscillator.. CICC, page 357-360. IEEE, (2007)Differentially "bathtub"-tuned CMOS VCO using inductively coupled varactors., , and . ESSCIRC, page 501-504. IEEE, (2003)A 3.5-GHz PLL for fast low-IF/zero-IF LO switching in an 802.11 transceiver., , , and . IEEE J. Solid State Circuits, 40 (9): 1909-1921 (2005)A robust 43-GHz VCO in CMOS for OC-768 SONET applications., , , , and . IEEE J. Solid State Circuits, 39 (7): 1159-1163 (2004)A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling., , , , and . IEEE J. Solid State Circuits, 38 (7): 1148-1154 (2003)A 2.5 Gb/s Run-Length-Tolerant Burst-Mode CDR Based on a 1/8th-Rate Dual Pulse Ring Oscillator.. IEEE J. Solid State Circuits, 43 (8): 1763-1771 (2008)Low-Spur, Low-Phase-Noise Clock Multiplier Based on a Combination of PLL and Recirculating DLL With Dual-Pulse Ring Oscillator and Self-Correcting Charge Pump.. IEEE J. Solid State Circuits, 43 (12): 2967-2976 (2008)A coupled sawtooth oscillator combining low jitter with high control linearity., and . IEEE J. Solid State Circuits, 37 (6): 702-710 (2002)Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion., , , , , and . IEEE J. Solid State Circuits, 37 (8): 1003-1011 (2002)Reducing MOSFET 1/f noise and power consumption by switched biasing., , , and . IEEE J. Solid State Circuits, 35 (7): 994-1001 (2000)