( en | de | ru )

 

Disambiguation of "Tenhunen, Hannu"

Author of the publication

copydeleteadd this publication to your clipboard
Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing.

, , , , , and . IEEE Trans. Computers, 63 (3): 718-733 (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

John Tenhunen

Hannu Peltola

John Tenhunen

Thomas Hannus

Hannu Rauhala

 

Other publications of authors with the same name

Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation., , , , , and . PECCS, page 450-458. SciTePress, (2012)Hardware/software partitioning and minimizing memory interface traffic., , , , and . EURO-DAC, page 226-231. IEEE Computer Society, (1994)Combinatorial architectural level power optimization for a class of orthogonal transforms., and . ISCAS (1), page 70-75. IEEE, (1999)A DSL for the SegBus platform., , , and . SoCC, page 393-398. IEEE, (2009)Hierarchical Agent Monitoring Design Platform - Towards Self-aware and Adaptive Embedded Systems., , , , and . PECCS, page 573-581. SciTePress, (2011)Skewing-based method for reduction of functional crosstalk and power supply noise caused by on-chip buses., , and . IET Comput. Digit. Tech., 6 (2): 114-124 (2012)Energy-Aware VM Consolidation in Cloud Data Centers Using Utilization Prediction Model., , , , , and . IEEE Trans. Cloud Comput., 7 (2): 524-536 (2019)Can Dark Silicon Be Exploited to Prolong System Lifetime?, , , , , , and . IEEE Des. Test, 34 (2): 51-59 (2017)Special issue on networks on chip., , and . J. Syst. Archit., 50 (2-3): 61-63 (2004)System level interconnect design for network-on-chip using interconnect IPs., , , and . SLIP, page 117-124. ACM, (2003)