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Disambiguation of "Wen, Tai-Hao"

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A 40-nm, 2M-Cell, 8b-Precision, Hybrid SLC-MLC PCM Computing-in-Memory Macro with 20.5 - 65.0TOPS/W for Tiny-Al Edge Devices.

, , , , , , , , , and . ISSCC, page 1-3. IEEE, (2022)

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Xiaofei Hao

Wenjin Hao

Xavier Taixés i Ventosa

Theoretical and algorithmic aspects of congruences between modular Galois representations. Uni Duisburg-Essen, (2009)

Jin Hao

Jun Hao

 

Other publications of authors with the same name

A 40-nm, 2M-Cell, 8b-Precision, Hybrid SLC-MLC PCM Computing-in-Memory Macro with 20.5 - 65.0TOPS/W for Tiny-Al Edge Devices., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2022)8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 58 (1): 303-315 (2023)An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices., , , , , , , , , and 4 other author(s). ISSCC, page 1-3. IEEE, (2022)Reliable Computing of ReRAM Based Compute-in-Memory Circuits for AI Edge Devices., , , and . ICCAD, page 158:1-158:6. ACM, (2022)A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices., , , , , , , , , and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Challenges in Circuits of Nonvolatile Compute-In-Memory for Edge AI Chips., , , , , , and . MWSCAS, page 98-102. IEEE, (2023)34.8 A 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with 31.2TFLOPS/W for AI Edge Devices., , , , , , , , , and 8 other author(s). ISSCC, page 580-582. IEEE, (2024)A Nonvolatile Al-Edge Processor with 4MB SLC-MLC Hybrid-Mode ReRAM Compute-in-Memory Macro and 51.4-251TOPS/W., , , , , , , , , and 6 other author(s). ISSCC, page 258-259. IEEE, (2023)A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 59 (1): 116-127 (January 2024)