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Disambiguation of "Pozzi, Laura"

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Slack-aware scheduling on Coarse Grained Reconfigurable Arrays.

, , , and . DATE, page 1513-1516. IEEE, (2011)

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Daniel Pozzi

Franz Pozzi

Mario Laura

Marco Laurati

Riccardo Edmondo Pozzi

 

Other publications of authors with the same name

Minimizing the Application Time for Manufacturer Testing of FPGA (Abstract)., , , and . FPGA, page 258. ACM, (1998)Virtual memory window for application-specific reconfigurable coprocessors., , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (8): 910-915 (2006)Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design., , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 14-29. Springer, (2020)ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (7): 754-762 (2006)HyperPUT: Generating Synthetic Faulty Programs to Challenge Bug-Finding Tools., , and . CoRR, (2022)SAT-MapIt: A SAT-based Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures., , and . DATE, page 1-6. IEEE, (2023)Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits., , , , and . DSN-W, page 199-202. IEEE, (2023)Graph Neural Networks for High-Level Synthesis Design Space Exploration., , , , and . ACM Trans. Design Autom. Electr. Syst., 28 (2): 25:1-25:20 (March 2023)Partition and Propagate: an Error Derivation Algorithm for the Design of Approximate Circuits., , , and . DAC, page 40. ACM, (2019)Virtual memory window for application-specific reconfigurable coprocessors., , and . DAC, page 948-953. ACM, (2004)