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Customizing Software Toolkits for Embedded Systems-On-Chip., , and . DIPES, volume 189 of IFIP Conference Proceedings, page 87-98. Kluwer, (2000)ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement, , , , and . CoRR, (2007)Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation, and . CoRR, (2007)Fast Configurable-Cache Tuning With a Unified Second-Level Cache., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (1): 80-91 (2009)Real-time analysis of resource-constrained distributed systems by simulation-guided model checking., and . SIGBED Rev., 5 (1): 7 (2008)Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores., , , , , and . IEEE Trans. Multi Scale Comput. Syst., 4 (4): 944-951 (2018)NoC-based fault-tolerant cache design in chip multiprocessors., , and . ACM Trans. Embed. Comput. Syst., 13 (3s): 115:1-115:26 (2014)System-level PVT variation-aware power exploration of on-chip communication architectures., , , and . ACM Trans. Design Autom. Electr. Syst., 14 (2): 20:1-20:25 (2009)Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT-RAM Based Router., , , and . IEEE Trans. Computers, 68 (8): 1174-1189 (2019)Performance estimation of distributed real-time embedded systems by discrete event simulations., , and . EMSOFT, page 183-192. ACM, (2007)