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Disambiguation of "Hsu, Tzu-Hsiang"

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A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array.

, , , , , , , , , , , and . BioCAS, page 1-4. IEEE, (2018)

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Hsiang-Hsu Wang

Hsiang-Wen Hsu

Hsiang-Hao Hsu

Hsiang Kuang

Mathäus Tzurmbakis

 

Other publications of authors with the same name

A CMOS Time-of-Flight Depth Image Sensor With In-Pixel Background Light Cancellation and Phase Shifting Readout Technique., , , and . IEEE J. Solid State Circuits, 53 (10): 2898-2905 (2018)An interactive flower image recognition system., , and . Multimedia Tools Appl., 53 (1): 53-73 (2011)A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction., , , , , , and . IEEE J. Solid State Circuits, 56 (5): 1588-1596 (2021)A 0.8V Intelligent Vision Sensor with Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification., , , , , , , and . ISSCC, page 1-3. IEEE, (2022)A CMOS imaging platform using single photon avalanche diode array in standard technology., and . IEEE SENSORS, page 1-3. IEEE, (2017)A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel., , , , , , , , and . IEEE J. Solid State Circuits, 56 (8): 2516-2524 (2021)A Current-Mode Differential Sensing CMOS Imager for Optical Linear Encoder., , , and . VLSI-DAT, page 1-2. IEEE, (2019)A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array., , , , , , , , , and 2 other author(s). BioCAS, page 1-4. IEEE, (2018)A Monolithic Optical Encoder using CMOS Image Sensor with Background Light Cancellation., , , , and . ISCAS, page 1-4. IEEE, (2020)A 12-Bit SAR ADC with Reference Voltage Ripple Suppression., , , and . ISCAS, page 1-4. IEEE, (2021)