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Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning.

, , and . ACM Journal of Experimental Algorithmics, (2000)

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Admissibility Proofs for the LCS* Algorithm., , , and . IBERAMIA-SBIA, volume 1952 of Lecture Notes in Computer Science, page 236-244. Springer, (2000)Hypergraph Partitioning with Fixed Vertices., , and . DAC, page 355-359. ACM Press, (1999)Effective Iterative Techniques for Fingerprinting Design IP., , , , , , and . DAC, page 843-848. ACM Press, (1999)Hypergraph partitioning with fixed vertices VLSI CAD., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (2): 267-272 (2000)Hierarchical whitespace allocation in top-down placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (11): 1550-1556 (2003)Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning., , and . ALENEX, volume 1619 of Lecture Notes in Computer Science, page 177-193. Springer, (1999)Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms., and . IEEE Des. Test Comput., 19 (3): 72-81 (2002)Effective iterative techniques for fingerprinting design IP., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (2): 208-215 (2004)GTX: the MARCO GSRC technology extrapolation system., , , , , , , , and . DAC, page 693-698. ACM, (2000)Optimal partitioners and end-case placers for standard-cell layout., , and . ISPD, page 90-96. ACM, (1999)