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A Fully Integrated Battery-Powered System-on-Chip in 40-nm CMOS for Closed-Loop Control of Insect-Scale Pico-Aerial Vehicle., , , , , , , , , and . IEEE J. Solid State Circuits, 52 (9): 2374-2387 (2017)14.3 A 28nm SoC with a 1.2GHz 568nJ/prediction sparse deep-neural-network engine with >0.1 timing error rate tolerance for IoT applications., , , , , and . ISSCC, page 242-243. IEEE, (2017)SMIV: A 16-nm 25-mm² SoC for IoT With Arm Cortex-A53, eFPGA, and Coherent Accelerators., , , , , and . IEEE J. Solid State Circuits, 57 (2): 639-650 (2022)Sub-uJ deep neural networks for embedded applications., , , and . ACSSC, page 1912-1915. IEEE, (2017)DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications., , , and . IEEE J. Solid State Circuits, 53 (9): 2722-2731 (2018)Evaluation of voltage stacking for near-threshold multicore computing., , and . ISLPED, page 373-378. ACM, (2012)A Wide Dynamic Range Sparse FC-DNN Processor with Multi-Cycle Banked SRAM Read and Adaptive Clocking in 16nm FinFET., , , , , and . ESSCIRC, page 158-161. IEEE, (2018)A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter., , , , and . VLSIC, page 318-. IEEE, (2015)A 16-nm Always-On DNN Processor With Adaptive Clocking and Multi-Cycle Banked SRAMs., , , and . IEEE J. Solid State Circuits, 54 (7): 1982-1992 (2019)CHIPKIT: An Agile, Reusable Open-Source Framework for Rapid Test Chip Development., , , , , and . IEEE Micro, 40 (4): 32-40 (2020)