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Disambiguation of "Wachter, Bart De"

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Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM.

, , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (3): 183-187 (2010)

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Bart Cramer

Bart Maris

Bart Kersbergen

Bart Riel

Bart Geurts

 

Other publications of authors with the same name

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology., , , , , , , , , and 27 other author(s). IEEE J. Solid State Circuits, 46 (1): 293-307 (2011)A fully automatic test system for characterizing large-array fine-pitch micro-bump probe cards., , , , , and . ITC-Asia, page 144-149. IEEE, (2017)3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps., , , , , , , , , and 9 other author(s). ICICDT, page 1-4. IEEE, (2012)Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (3): 183-187 (2010)Automated testing of bare die-to-die stacks., , , , , and . ITC, page 1-10. IEEE, (2015)Vesuvius-3D: A 3D-DfT demonstrator., , , , , and . ITC, page 1-10. IEEE Computer Society, (2014)Design issues and considerations for low-cost 3D TSV IC technology., , , , , , , , , and 24 other author(s). ISSCC, page 148-149. IEEE, (2010)