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Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.

J. Lopez, L. Hudeley, L. Grenouillet, D. Robayo, J. Sandrini, G. Navarro, M. Bernard, C. Carabasse, D. Deleruyelle, N. Castellani, M. Bocquet, J. Portal, E. Nowak, and G. Molas. IRPS, page 1-6. IEEE, (2021)

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Peter Sandrini

Erhard Jury

Christine Jury

Alexandra Eva Jurytko

Mira Jury

Other publications of authors with the same name

Evolution of oxygen vacancies under electrical characterization for HfOx-based ReRAMs.B. Attarimashalkoubeh, J. Sandrini, E. Shahrabi, and Y. Leblebici. ESSDERC, page 152-155. IEEE, (2017)The key impact of incorporated Al2O3 barrier layer on W-based ReRAM switching performance.E. Shahrabi, C. Giovinazzo, J. Sandrini, and Y. Leblebici. PRIME, page 69-72. IEEE, (2018)Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.J. Lopez, L. Hudeley, L. Grenouillet, D. Robayo, J. Sandrini, G. Navarro, M. Bernard, C. Carabasse, D. Deleruyelle, N. Castellani and 4 other author(s). IRPS, page 1-6. IEEE, (2021)A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.J. Palhares, Y. Beilliard, J. Sandrini, F. Arnaud, K. Garello, G. Prenat, L. Anghel, F. Alibart, D. Drouin, and P. Galy. CoRR, (2023)A ultra-low-power FPGA based on monolithically integrated RRAMs.P. Gaillardon, X. Tang, J. Sandrini, M. Thammasack, S. Omam, D. Sacchetto, Y. Leblebici, and G. Micheli. DATE, page 1203-1208. ACM, (2015)Low-voltage read/write circuit design for transistorless ReRAM crossbar arrays in 180nm CMOS technology.J. Sandrini, T. Demirci, M. Thammasack, D. Sacchetto, and Y. Leblebici. ISCAS, page 9-12. IEEE, (2015)Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology.J. Sandrini, M. Barlas, M. Thammasack, T. Demirci, M. Marchi, D. Sacchetto, P. Gaillardon, G. Micheli, and Y. Leblebici. IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Improving Ge-rich GST ePCM reliability through BEOL engineering.A. Redaelli, A. Gandolfo, G. Samanni, E. Gomiero, E. Petroni, L. Scotti, A. Lippiello, P. Mattavelli, J. Jasse, D. Codegoni and 27 other author(s). ESSDERC, page 231-234. IEEE, (2021)

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Disambiguation of "Sandrini, Jury"

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Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.

Please choose a person to relate this publication to

Peter Sandrini

Erhard Jury

Christine Jury

Alexandra Eva Jurytko

Mira Jury

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sandrini, Jury"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.

Please choose a person to relate this publication to

Peter Sandrini

Erhard Jury

Christine Jury

Alexandra Eva Jurytko

Mira Jury

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.