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The Danger of Interval-Based Power Efficiency Metrics: When Worst Is Best.

, , , и . IEEE Comput. Archit. Lett., 4 (1): 1 (2005)

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Exploring the Potential of Architecture-Level Power Optimizations., и . PACS, том 3164 из Lecture Notes in Computer Science, стр. 132-147. Springer, (2003)Heterogeneous Computing Guest editors' introduction., и . IEEE Micro, 35 (4): 4-5 (2015)Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management., , и . IEEE Micro, 39 (3): 75-83 (2019)Symbiotic jobscheduling for a simultaneous multithreaded processor, и . SIGARCH Comput. Archit. News, 28 (5): 234--244 (ноября 2000)Editorial: Special Section on CMP Architectures., и . IEEE Trans. Parallel Distributed Syst., 18 (8): 1025-1027 (2007)Introduction., и . ACM Trans. Archit. Code Optim., 2 (1): 1-2 (2005)Mitigating Speculative Execution Attacks via Context-Sensitive Fencing., , и . IEEE Des. Test, 39 (4): 49-57 (2022)Fast switching of threads between cores., , , , и . ACM SIGOPS Oper. Syst. Rev., 43 (2): 35-45 (2009)Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy., , , и . MICRO, стр. 183-194. IEEE Computer Society, (2004)Control Flow Optimization Via Dynamic Reconvergence Prediction., , и . MICRO, стр. 129-140. IEEE Computer Society, (2004)