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Disambiguation of "Chow, Fred C."

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Partial redundancy elimination in SSA form.

, , , , , and . ACM Trans. Program. Lang. Syst., 21 (3): 627-676 (1999)

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Yu-Kang Chow

Kamal Chowdhury

Tobias Chowdhury

Ho Ming Chow

Kai Uwe Chow

 

Other publications of authors with the same name

A near-optimal instruction scheduler for a tightly constrained, variable instruction set embedded processor., and . CASES, page 9-18. ACM, (2002)Strength Reduction via SSAPRE., , , , , and . CC, volume 1383 of Lecture Notes in Computer Science, page 144-158. Springer, (1998)Effective Representation of Aliases and Indirect Memory Operations in SSA Form., , , , and . CC, volume 1060 of Lecture Notes in Computer Science, page 253-267. Springer, (1996)Minimizing Register Usage Penalty at Procedure Calls.. PLDI, page 85-94. ACM, (1988)Loop induction variable canonicalization in parallelizing compilers., , and . IEEE PACT, page 228-237. IEEE Computer Society, (1996)Partial redundancy elimination in SSA form., , , , , and . ACM Trans. Program. Lang. Syst., 21 (3): 627-676 (1999)The Priority-Based Coloring Approach to Register Allocation., and . ACM Trans. Program. Lang. Syst., 12 (4): 501-536 (1990)Improving resource utilization of the MIPS R8000 via post-scheduling global instruction distribution., , , and . MICRO, page 148-152. ACM / IEEE Computer Society, (1994)Effective Compilation Support for Variable Instruction Set Architecture., , and . IEEE PACT, page 56-67. IEEE Computer Society, (2002)Register allocation by priority-based coloring., and . SIGPLAN Symposium on Compiler Construction, page 222-232. ACM, (1984)