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Loop induction variable canonicalization in parallelizing compilers.

, , and . IEEE PACT, page 228-237. IEEE Computer Society, (1996)

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A New Algorithm for Partial Redundancy Elimination based on SSA Form., , , , , and . PLDI, page 273-286. ACM, (1997)Partial redundancy elimination in SSA form., , , , , and . ACM Trans. Program. Lang. Syst., 21 (3): 627-676 (1999)Improving resource utilization of the MIPS R8000 via post-scheduling global instruction distribution., , , and . MICRO, page 148-152. ACM / IEEE Computer Society, (1994)Register Promotion by Partial Redundancy Elimination of Loads and Stores., , , , and . PLDI, page 26-37. ACM, (1998)Inline Analysis: Beyond Selection Heuristics., and . CGO, page 221-232. IEEE Computer Society, (2006)Strength Reduction via SSAPRE., , , , , and . CC, volume 1383 of Lecture Notes in Computer Science, page 144-158. Springer, (1998)Effective Representation of Aliases and Indirect Memory Operations in SSA Form., , , , and . CC, volume 1060 of Lecture Notes in Computer Science, page 253-267. Springer, (1996)Semantic and behavioral library transformations., , , and . Inf. Softw. Technol., 44 (13): 797-810 (2002)Loop induction variable canonicalization in parallelizing compilers., , and . IEEE PACT, page 228-237. IEEE Computer Society, (1996)Scalable High Performance Cross-Module Inlining., , , , and . IEEE PACT, page 165-176. IEEE Computer Society, (2004)