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A dynamically scheduled architecture for the synthesis of graph methods.

, , , , and . Hot Chips Symposium, page 1-7. IEEE, (2016)

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Irregular Applications: From Architectures to Algorithms Guest editors' introduction., and . Computer, 48 (8): 14-16 (2015)Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems., , , , and . ICSAMOS, page 142-149. IEEE, (2008)Irregular applications: architectures & algorithms., , , and . IA3@SC, page 1-2. ACM, (2011)Scaling Semantic Graph Databases in Size and Performance., , , , , , , and . IEEE Micro, 34 (4): 16-26 (2014)YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs., , , and . RSP, page 123-129. IEEE, (2013)Bridging Python to Silicon: The SODA Toolchain., , , , , , , , , and 2 other author(s). IEEE Micro, 42 (5): 78-88 (2022)Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs., , , , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 179-192. Springer, (2007)Energy characterization of graph workloads., , and . Sustain. Comput. Informatics Syst., 29 (Part): 100465 (2021)The Future is Big Graphs! A Community View on Graph Processing Systems., , , , , , , , , and 31 other author(s). CoRR, (2020)Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators., , , , , , , , , and 3 other author(s). ICCAD, page 1-7. IEEE, (2021)