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A Task Failure Rate Aware Dual-Channel Solar Power System for Nonvolatile Sensor Nodes.

, , , , , and . ACM Trans. Embed. Comput. Syst., 18 (4): 33:1-33:21 (2019)

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Accurate and Fast Estimation of Junction Band-to-Band Leakage in Nanometer-Scale MOSFET., , and . APCCAS, page 956-959. IEEE, (2006)A fault-tolerant structure for reliable multi-core systems based on hardware-software co-design., , , and . ISQED, page 191-197. IEEE, (2010)TSV-aware topology generation for 3D Clock Tree Synthesis., , , , , , and . ISQED, page 300-307. IEEE, (2013)Increasing Compression Ratio of Low Complexity Compressive Sensing Video Encoder with Application-Aware Configurable Mechanism., , , and . CoRR, (2013)A Survey of FPGA Based Neural Network Accelerator., , , , and . CoRR, (2017)14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse., , , , , , , , , and 1 other author(s). ISSCC, page 234-236. IEEE, (2020)Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation., , , , , and . IEEE Trans. Dependable Secur. Comput., 8 (5): 756-769 (2011)DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 2981-2994 (2017)Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory., , , , , , and . ASP-DAC, page 407-413. IEEE, (2020)NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (2): 261-274 (2013)