Author of the publication

DiffLo: A Graph-based Method for Functional Discrepancy Localization in High-level Synthesis.

, , , and . ICFPT, page 300-301. IEEE, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network., , , , , , and . FPGA, page 143-153. ACM, (2024)MiniTNtk: An Exact Synthesis-based Method for Minimizing Transistor Network., , , , , , , , and . ICCAD, page 1-9. IEEE, (2023)FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs., , , , and . FPGA, page 15-25. ACM, (2023)Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis., , , and . DATE, page 1130-1135. IEEE, (2019)FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs., , , , and . CoRR, (2022)A Hybrid Data-Consistent Framework for Link-Aware AccessManagement in Emerging CPU-FPGA Platforms., , , , and . FPGA, page 188. ACM, (2019)PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN., , , and . DAC, page 1-6. IEEE, (2023)Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis., , , , and . ICCAD, page 1-6. ACM, (2019)HL-Pow: Learning-Assisted Pre-RTL Power Modeling and Optimization for FPGA HLS., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 3925-3938 (November 2023)AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining., , , and . CoRR, (2022)