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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

L. Guo, Y. Chi, J. Lau, L. Song, X. Tian, M. Khatti, W. Qiao, J. Wang, E. Ustun, Z. Fang, Z. Zhang, and J. Cong. CoRR, (2022)

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Weikang Zheng

Miao Qiao

Linhan Qiao

Wenchao Qiao

Fei Qiao

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TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design.L. Guo, Y. Chi, J. Lau, L. Song, X. Tian, M. Khatti, W. Qiao, J. Wang, E. Ustun, Z. Fang and 2 other author(s). ACM Trans. Reconfigurable Technol. Syst., 16 (4): 63:1-63:31 (December 2023)AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs.L. Guo, Y. Chi, J. Wang, J. Lau, W. Qiao, E. Ustun, Z. Zhang, and J. Cong. FPGA, page 81-92. ACM, (2021)RapidStream: Parallel Physical Implementation of FPGA HLS Designs.L. Guo, P. Maidee, Y. Zhou, C. Lavin, J. Wang, Y. Chi, W. Qiao, A. Kaviani, Z. Zhang, and J. Cong. FPGA, page 1-12. ACM, (2022)Democratizing Domain-Specific Computing.Y. Chi, W. Qiao, A. Sohrabizadeh, J. Wang, and J. Cong. CoRR, (2022)High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms.W. Qiao, J. Du, Z. Fang, M. Lo, M. Chang, and J. Cong. FCCM, page 37-44. IEEE Computer Society, (2018)TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.L. Guo, Y. Chi, J. Lau, L. Song, X. Tian, M. Khatti, W. Qiao, J. Wang, E. Ustun, Z. Fang and 2 other author(s). CoRR, (2022)High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only).W. Qiao, J. Du, Z. Fang, L. Wang, M. Lo, M. Chang, and J. Cong. FPGA, page 291. ACM, (2018)TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs.W. Qiao, L. Guo, Z. Fang, M. Chang, and J. Cong. IEEE Trans. Emerg. Top. Comput., 11 (2): 404-419 (April 2023)Democratizing Domain-Specific Computing.Y. Chi, W. Qiao, A. Sohrabizadeh, J. Wang, and J. Cong. Commun. ACM, 66 (1): 74-85 (2023)FANS: FPGA-Accelerated Near-Storage Sorting.W. Qiao, J. Oh, L. Guo, M. Chang, and J. Cong. FCCM, page 106-114. IEEE, (2021)

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Disambiguation of "Qiao, Weikang"

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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

Please choose a person to relate this publication to

Weikang Zheng

Miao Qiao

Linhan Qiao

Wenchao Qiao

Fei Qiao

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Qiao, Weikang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

Please choose a person to relate this publication to

Weikang Zheng

Miao Qiao

Linhan Qiao

Wenchao Qiao

Fei Qiao

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.