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A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification for Memories.

, , , , и . IEEE Trans. Very Large Scale Integr. Syst., 19 (12): 2184-2194 (2011)

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Wu Wen

Wen Wu

Ching-Wen Hsueh

Wen-Ching Fann

Ching-chang Wu

 

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A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification for Memories., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 19 (12): 2184-2194 (2011)Distributed Fault Simulation for Sequential Circuits by Pattern Partitioning., , , и . EDAC-ETC-EUROASIC, стр. 661. IEEE Computer Society, (1994)MRAM Defect Analysis and Fault Modeli., , , , , , и . ITC, стр. 124-133. IEEE Computer Society, (2004)A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories., , , , и . MTDT, стр. 65-69. IEEE Computer Society, (2004)A Multilayer Data Copy Test Data Compression Scheme for Reducing Shifting-in Power for Multiple Scan Design., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 15 (7): 767-776 (2007)Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2097-2101 (2008)Diagnosis for MRAM write disturbance fault., , , , , , и . ITC, стр. 1-9. IEEE Computer Society, (2007)Fault diagnosis of odd-even sorting networks., , , и . Asian Test Symposium, стр. 288-. IEEE Computer Society, (1997)A Probabilistic Testability Measure for Delay Faults., и . DAC, стр. 440-445. ACM, (1991)CAD reference flow for 3D via-last integrated circuits., , , , и . ASP-DAC, стр. 187-192. IEEE, (2010)