Author of the publication

Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices.

, , , , , and . IEICE Trans. Electron., 93-C (5): 596-601 (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)., , , , , , , and . IEICE Trans. Electron., 91-C (5): 731-735 (2008)Bias Polarity Dependent Resistive Switching Behaviors in Silicon Nitride-Based Memory Cell., , , and . IEICE Trans. Electron., 99-C (5): 547-550 (2016)InGaAs/Si Heterojunction Tunneling Field-Effect Transistor on Silicon Substrate., , , , , and . IEICE Trans. Electron., 97-C (7): 677-682 (2014)Resistive Switching Characteristics of Silicon Nitride-Based RRAM Depending on Top Electrode Metals., , , , and . IEICE Trans. Electron., 98-C (5): 429-433 (2015)Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme., , , , , , , , and . IEICE Trans. Electron., 91-C (5): 742-746 (2008)Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices., , , , , and . IEICE Trans. Electron., 93-C (5): 596-601 (2010)Insertion of Ag Layer in TiN/SiNx/TiN RRAM and Its Effect on Filament Formation Modeled by Monte Carlo Simulation., , , , , , , , , and . IEEE Access, (2020)Investigation of source-to-drain capacitance by DIBL effect of silicon nanowire MOSFETs., , and . IEICE Electron. Express, 7 (19): 1499-1503 (2010)Effects of Misaligned Gate Lapping Over the Channel on Performances of Ultra-Thin Vertical-Pillar MOSFET., and . ICEIC, page 1-2. IEEE, (2024)Accurate Extraction of the Trap Depth from RTS Noise Data by Including Poly Depletion Effect and Surface Potential Variation in MOSFETs., , , and . IEICE Trans. Electron., 90-C (5): 968-972 (2007)