( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Modeling FinFET metal gate stack resistance for 14nm node and beyond.

, , , , , , , , и . ICICDT, стр. 1-4. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Abdelkarim Habib

Abdelkarim Omar

Abdelkarim Mouhssine

Abdelkarim Kerbaa

Abdelkarim Belhoula

 

Другие публикации лиц с тем же именем

Impact on the back gate degradation in partially depleted SOI n-MOSFETs by 2-MeV electron irradiation., , , , , , , и . Microelectron. Reliab., 46 (9-11): 1731-1735 (2006)Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges., , , , и . CICC, стр. 679-686. IEEE, (2006)Analysis of microbump induced stress effects in 3D stacked IC technologies., , , , , , , , , и 9 other автор(ы). 3DIC, стр. 1-5. IEEE, (2011)Holisitic device exploration for 7nm node., , , , , , , , , и 5 other автор(ы). CICC, стр. 1-5. IEEE, (2015)Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM., , , , , , , и . ICICDT, стр. 1-4. IEEE, (2015)A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS., , , , , , , , , и . IEEE J. Solid State Circuits, 40 (7): 1434-1442 (2005)Technology and architecture for deep submicron RF CMOS technology.. SBCCI, стр. 4. ACM, (2005)STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process., , , , , , , , и . ESSDERC, стр. 159-162. IEEE, (2013)Degradation of electrical performance and floating body effect in ultra thin gate oxide FD-SOI n-MOSFETs by 7.5-MeV proton irradiation., , , , , , , и . Microelectron. Reliab., 44 (9-11): 1721-1726 (2004)Low-cost feedback-enabled LNAs in 45nm CMOS., , , , и . ESSCIRC, стр. 100-103. IEEE, (2009)