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RAGuard: An Efficient and User-Transparent Hardware Mechanism against ROP Attacks.

, , , , , , , , and . ACM Trans. Archit. Code Optim., 15 (4): 50:1-50:21 (2019)

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Drowsy region-based caches: minimizing both dynamic and static power dissipation., , and . Conf. Computing Frontiers, page 378-384. ACM, (2005)Twin-Load: Building a Scalable Memory System over the Non-Scalable Interface., , , , and . CoRR, (2015)A Cost Model For Integrated Restructuring Optimizations., , , and . J. Instruction-Level Parallelism, (2003)Guest Editor's Introduction.. Int. J. Parallel Program., 35 (3): 179-180 (2007)Memory Wall., and . Encyclopedia of Parallel Computing, Springer, (2011)Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems., , , and . HiPEAC, volume 4367 of Lecture Notes in Computer Science, page 23-37. Springer, (2007)Beyond Basic Region Caching: Specializing Cache Structures for High Performance and Energy Conservation., , and . HiPEAC, volume 3793 of Lecture Notes in Computer Science, page 102-115. Springer, (2005)Techniques to Measure, Model, and Manage Power., , and . Advances in Computers, (2012)The Impulse Memory Controller., , , , , , , and . IEEE Trans. Computers, 50 (11): 1117-1132 (2001)Compiler-enhanced incremental checkpointing for OpenMP applications., , , , and . PPoPP, page 275-276. ACM, (2008)