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Disambiguation of "Chen, Charlie Chung-Ping"

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LTCC spiral inductor modeling, synthesis, and optimization.

, , , and . ASP-DAC, page 768-771. IEEE, (2008)

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Ping-Cheng Chung

Shun-Ping Chen

Ping-Shun Chen

Ping-Chen Huang

Chung-Chuan Chen

 

Other publications of authors with the same name

An At-Speed Test Technique for High-Speed High-order Adder by a 6.4-GHz 64-bit Domino Adder Example., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (8): 1644-1655 (2012)Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (6): 1183-1191 (2006)A high dynamic range programmable gain amplifier for HomePlug AV powerline communication system., , and . ISCAS, page 2715-2718. IEEE, (2013)A fast-settling high linearity auto gain control for broadband OFDM-based PLC system., , , and . ISCAS, page 2852-2855. IEEE, (2015)Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation., , , , , and . ISCAS, page 950-953. IEEE, (2014)A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme., , , , , and . ISCAS, page 2393-2396. IEEE, (2015)Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications., , , and . DAC, page 694-697. ACM, (2008)A 6.7MHz-to-1.24GHz 0.0318mm2 fast-locking all-digital DLL in 90nm CMOS., , , and . ISSCC, page 244-246. IEEE, (2012)PODEA: Power delivery efficient analysis with realizable model reduction., , and . ISCAS (4), page 608-611. IEEE, (2003)Realizable Reduction for Electromagnetically Coupled RLMC Interconnects., and . DATE, page 1400-1401. IEEE Computer Society, (2004)