Author of the publication

Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems.

, , , , and . PDP, page 220-226. IEEE, (1994)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Quasi-static Scheduling for Concurrent Architectures., , , , and . Fundam. Informaticae, 62 (2): 171-196 (2004)A region-based theory for state assignment in speed-independent circuits., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (8): 793-812 (1997)Coupling Asynchrony and Interrupts: Place Chart Nets., , , , , and . ICATPN, volume 1248 of Lecture Notes in Computer Science, page 328-347. Springer, (1997)Incremental high-level synthesis., , , , , , and . ASP-DAC, page 701-706. IEEE, (2010)Design of Asynchronous Controllers with Delay Insensitive Interface., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (12): 2577-2585 (2002)Analysis of Petri Nets by Ordering Relations in Reduced Unfoldings., , , and . Formal Methods Syst. Des., 12 (1): 5-38 (1998)Quasi-Static Scheduling for Concurrent Architectures., , , and . ACSD, page 29-40. IEEE Computer Society, (2003)Exploiting area/delay tradeoffs in high-level synthesis., , , and . DATE, page 1024-1029. IEEE, (2012)Realistic performance-constrained pipelining in high-level synthesis., , , and . DATE, page 1382-1387. IEEE, (2011)Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis., , , , and . ASYNC, page 240-253. IEEE Computer Society, (1997)