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Disambiguation of "Rajaee, Omid"

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Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC.

, , , , , , and . IEEE J. Solid State Circuits, 45 (4): 719-730 (2010)

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Saeed Rajaee

Mohammad-Reza Omidi

Mohammed-Esmail Omidi

Sirous Omid

Omid Rezania

 

Other publications of authors with the same name

Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer., , , , and . IEEE J. Solid State Circuits, 46 (11): 2458-2468 (2011)Highly Linear Noise-Shaped Pipelined ADC Utilizing a Relaxed Accuracy Front-End., and . IEEE J. Solid State Circuits, 48 (2): 502-515 (2013)Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer., and . ISCAS, page 1212-1215. IEEE, (2008)Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications., , and . ICECS, page 210-213. IEEE, (2007)Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC., , , , , , and . IEEE J. Solid State Circuits, 45 (4): 719-730 (2010)An interstage correlated double sampling technique for switched-capacitor gain stages., , , , and . ISCAS, page 1252-1255. IEEE, (2010)A high speed, high resolution, low voltage current mode sample and hold., and . ISCAS (2), page 1417-1420. IEEE, (2005)A 1.5V 150MS/s current-mode sample-and-hold circuit., , , and . ECCTD, page 91-94. IEEE, (2005)A low voltage, high speed, high resolution class AB switched current sample and hold., , and . ISCAS, IEEE, (2006)A low voltage, high speed current mode sample and hold for high precision applications., and . ECCTD, page 269-272. IEEE, (2005)