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Low Power SPI Design Based on Relative Timing Techniques., , , , , and . ICECS, page 166-169. IEEE, (2019)Synchronous elasticization at a reduced cost: Utilizing the ultra simple fork and controller merging., and . ICCAD, page 794-801. IEEE Computer Society, (2011)Bandwidth optimization in asynchronous NoCs by customizing link wire length., , and . ICCD, page 455-461. IEEE Computer Society, (2010)Energy and Performance Models for Clocked and Asynchronous Communication.. ASYNC, page 56-67. IEEE Computer Society, (2003)A Single Chip Low Power Asynchronous Implementation of an FFT Algorithm for Space Applications., , , and . ASYNC, page 216-223. IEEE Computer Society, (1998)Physical Design Variation in Relative Timed Asynchronous Circuits., and . ISVLSI, page 278-283. IEEE Computer Society, (2017)Link pipelining strategies for an application-specific asynchronous NoC., , and . NOCS, page 185-192. ACM/IEEE Computer Society, (2011)Relative timing driven multi-synchronous design: enabling order-of-magnitude energy reduction.. ISPD, page 138. ACM, (2013)Design of a multi-style and multi-frequency FPGA., , , and . VLSI-SoC, page 1-6. IEEE, (2016)Control network generator for latency insensitive designs., and . DATE, page 1773-1778. IEEE Computer Society, (2010)