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, , , и . SIROCCO, том 6796 из Lecture Notes in Computer Science, стр. 113-124. Springer, (2011)

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Ekkehard Fugger

Dagmar Fugger

Dominik Fugger

Katharina Berit Fugger

Wolf-Dietrich Fugger

 

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Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining., , и . PODC, стр. 276-277. ACM, (2009)Reconciling fault-tolerant distributed computing and systems-on-chip., и . Distributed Comput., 24 (6): 323-355 (2012)How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining., , и . EDCC, стр. 230-239. IEEE Computer Society, (2010)Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance., , , и . ASYNC, стр. 68-77. IEEE Computer Society, (2018)The Involution Tool for Accurate Digital Timingand Power Analysis., , , и . PATMOS, стр. 1-8. IEEE, (2019)A Hybrid Delay Model for Interconnected Multi-Input Gates., , , и . CoRR, (2024)A faithful binary circuit model with adversarial noise., , , , и . DATE, стр. 1327-1332. IEEE, (2018)Reaching Agreement in Competitive Microbial Systems., , , , , , и . CoRR, (2021)Synthesis in presence of dynamic links., , , , и . Inf. Comput., 289 (Part): 104856 (2022)A Hybrid Delay Model for Interconnected Multi-Input Gates., , , и . DSD, стр. 381-390. IEEE, (2023)