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Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM in Embedded Systems., , , , and . IEEE Trans. Computers, 65 (7): 2313-2324 (2016)Accurate personal ultraviolet dose estimation with multiple wearable sensors., , , , , , and . BSN, page 347-352. IEEE, (2016)Sleep-aware mode assignment in wireless embedded systems., , and . J. Parallel Distributed Comput., 71 (7): 1002-1010 (2011)Optimizing scheduling and intercluster connection for application-specific DSP processors., , , and . IEEE Trans. Signal Process., 57 (11): 4538-4547 (2009)Algorithms to Minimize Data Transfer for Code Update on Wireless Sensor Network., , , , and . J. Signal Process. Syst., 71 (2): 143-157 (2013)Variable Length Pattern Matching for Hardware Network Intrusion Detection System., , , and . J. Signal Process. Syst., 59 (1): 85-93 (2010)Loop fusion and reordering for register file optimization on stream processors., , , and . J. Syst. Softw., 85 (7): 1673-1681 (2012)Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism., , , , , and . IEEE Trans. Parallel Distributed Syst., 31 (9): 2185-2200 (2020)Optimizing Address Assignment and Scheduling for DSPs With Multiple Functional Units., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (9): 976-980 (2006)Balanced loop retiming to effectively architect STT-RAM-based hybrid cache for VLIW processors., , , , , , and . SAC, page 1710-1716. ACM, (2016)