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Reducing leakage in a high-performance deep-submicron instruction cache.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (1): 77-89 (2001)

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Resource area dilation to reduce power density in throughput servers., and . ISLPED, page 268-273. ACM, (2007)An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches., , , , and . HPCA, page 147-157. IEEE Computer Society, (2001)Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines., , and . MICRO, page 294-304. IEEE Computer Society, (2005)Reducing set-associative cache energy via way-prediction and selective direct-mapping., , , , and . MICRO, page 54-65. ACM/IEEE Computer Society, (2001)Gated-Vdd: a circuit technique to reduce leakage in deep-submicron cache memories, , , , and . ISLPED, page 90-95. ACM, (2000)Reducing leakage in a high-performance deep-submicron instruction cache., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (1): 77-89 (2001)Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures., , and . MICRO, page 55-66. IEEE Computer Society, (2003)Heat-and-run: leveraging SMT and CMP to manage power density through the operating system., , and . ASPLOS, page 260-270. ACM, (2004)Exploiting Resonant Behavior to Reduce Inductive Noise., and . ISCA, page 288-301. IEEE Computer Society, (2004)Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise., and . ISLPED, page 223-228. ACM, (2003)