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XTENSTORE: Fast Shielded In-memory Key-Value Store on a Hybrid x86-FPGA System.

, , , , , , and . DATE, page 560-563. IEEE, (2022)

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Architectural Supports to Protect OS Kernels from Code-Injection Attacks., , , , , and . HASP@ISCA, page 5:1-5:8. ACM, (2016)Using CoreSight PTM to Integrate CRA Monitoring IPs in an ARM-Based SoC., , , , and . ACM Trans. Design Autom. Electr. Syst., 22 (3): 52:1-52:25 (2017)RiskiM: Toward Complete Kernel Protection with Hardware Support., , , , , and . DATE, page 740-745. IEEE, (2019)Data Randomization for Multi-Variant Execution Environment., , , and . ISOCC, page 291-292. IEEE, (2019)Exploring effective uses of the tagged memory for reducing bounds checking overheads., , , , , , , and . J. Supercomput., 79 (1): 1032-1064 (2023)XTENSTORE: Fast Shielded In-memory Key-Value Store on a Hybrid x86-FPGA System., , , , , , and . DATE, page 560-563. IEEE, (2022)Hardware Assisted Randomization of Data., , , , , , , , , and 1 other author(s). RAID, volume 11050 of Lecture Notes in Computer Science, page 337-358. Springer, (2018)Ambassy: A Runtime Framework to Delegate Trusted Applications in an ARM/FPGA Hybrid System., , , , , and . IEEE Trans. Mob. Comput., 22 (2): 708-719 (2023)Towards a practical solution to detect code reuse attacks on ARM mobile devices., , , , and . HASP@ISCA, page 3:1-3:8. ACM, (2015)Design of a Generic Security Interface for RISC-V Processors and its Applications., , , , and . ISOCC, page 40-41. IEEE, (2018)