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CustomTopo: a topology generation method for application-specific wavelength-routed optical NoCs.

, , , , and . ICCAD, page 100. ACM, (2018)

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Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip., , , and . Embedded Systems Design and Verification, CRC Press, (2009)Optimising pseudo-random built-in self-testing of fully synchronous as well as multisynchronous networks-on-chip., , , and . IET Comput. Digit. Tech., (2013)Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip., , , and . ACM Great Lakes Symposium on VLSI, page 125-128. ACM, (2009)Transparent lifetime built-in self-testing of networks-on-chip through the selective non-concurrent testing of their communication channels., and . AISTECS@HiPEAC, page 12-17. ACM, (2017)An Interconnect-Centric Approach to the Flexible Partitioning and Isolation of Many-Core Accelerators for Fog Computing., and . DCIS, page 1-6. IEEE, (2019)DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation Cost., , , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 419-426. Springer, (2015)Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip., , , , and . ICCAD, page 3. ACM, (2016)Assessing the Configuration Space of the Open Source NVDLA Deep Learning Accelerator on a Mainstream MPSoC Platform., , and . VLSI-SoC (Selected Papers), volume 621 of IFIP Advances in Information and Communication Technology, page 87-112. Springer, (2020)Interdisciplinary design of a research experience on microelectronic systems for K-12 students., and . EWME, page 64-69. IEEE, (2014)Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis., , , and . DATE, page 1589-1594. EDA Consortium San Jose, CA, USA / ACM DL, (2013)