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A methodology for formal design of hardware control with application to cache coherence protocols.

, , , , , and . DAC, page 724-729. ACM, (2000)

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Exploiting Concurrency among Tasks in Partitionable Parallel Processing Systems., , and . IPPS, page 30-38. IEEE Computer Society, (1992)A methodology for formal design of hardware control with application to cache coherence protocols., , , , , and . DAC, page 724-729. ACM, (2000)Parallel Fiber-Optic SCI Links., , , , and . IEEE Micro, 16 (1): 20-26 (1996)Disjoint Path Properties of the Data Manipulator Network Family., and . J. Parallel Distributed Comput., 9 (4): 419-423 (1990)Multiple Quadratic Forms: A Case Study in the Design of Data.Parallel Algorithms., , , , , , and . J. Parallel Distributed Comput., 21 (1): 124-139 (1994)Communication Techniques in Parallel Processing., , , and . Parallel Computing in Science and Engineering, volume 295 of Lecture Notes in Computer Science, page 35-60. Springer, (1987)A Methodology for Exploiting Concurrency among Independent Tasks in Partitionable Parallel Processing Systems., , and . J. Parallel Distributed Comput., 19 (3): 271-278 (1993)Multiple Quadratic Forms: A Case Study in the Design of Scalable Algorithms., , , , , , and . ICPP (3), page 37-46. CRC Press, (1993)Eliminating Memory for Fragmentation Within Partitionable SIMD/SPMD Machines., , , , and . IEEE Trans. Parallel Distributed Syst., 2 (3): 290-303 (1991)Fault Side-Effects in Fault Tolerant Multistage Interconnection Networks., , , , and . ICPP (1), page 313-317. CRC Press, (1991)