( en | de | ru )

 

Disambiguation of "Dey, Bappaditya"

Author of the publication

copydeleteadd this publication to your clipboard
Adaptive Hardware Architecture for Neural-Network-on-Chip.

, , , and . MWSCAS, page 1-4. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Joseph Dey

Horst Dey

Pradip Dey

Günther Dey

Rosmarie Dey

 

Other publications of authors with the same name

An Efficient Embryonic Hardware Architecture based on Network-on-Chip., , , , and . MWSCAS, page 449-452. IEEE, (2021)A Reversible-Logic based Architecture for VGGNet., , , and . ICECS, page 1-4. IEEE, (2021)A Comparative Study of Deep-Learning Object Detectors for Semiconductor Defect Detection., , and . ICECS 2022, page 1-2. IEEE, (2022)SEMI-DiffusionInst: A Diffusion Model Based Approach for Semiconductor Defect Classification and Segmentation., , , and . CoRR, (2023)A Machine Learning Approach Towards SKILL Code Autocompletion., , and . CoRR, (2023)Robust segmentation and accurate target definition for positron emission tomography images using Affinity Propagation., , , , , , , and . ISBI, page 1461-1464. IEEE, (2013)A Novel Reconfigurable Hardware Architecture of Neural Network., , , , and . MWSCAS, page 618-621. IEEE, (2019)SEMI-PointRend: Improved Semiconductor Wafer Defect Classification and Segmentation as Rendering., , , , and . CoRR, (2023)SEMI-CenterNet: A Machine Learning Facilitated Approach for Semiconductor Defect Inspection., , , , , and . CoRR, (2023)Adaptive Hardware Architecture for Neural-Network-on-Chip., , , and . MWSCAS, page 1-4. IEEE, (2022)