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Hardware transactional memory with software-defined conflicts.

, , , , , , , and . ACM Trans. Archit. Code Optim., 8 (4): 31:1-31:20 (2012)

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Embracing diversity in the Barrelfish manycore operating system, , , , , , and . Proceedings of the Workshop on Managed Many-Core Systems, (June 2008)Persistent Memory Transactions., , , , , , , , , and 1 other author(s). CoRR, (2018)The Influence of Malloc Placement on TSX Hardware Transactional Memory., , , and . CoRR, (2015)Hardware Trends: Challenges and Opportunities in Distributed Computing.. SIGACT News, 46 (2): 89-95 (2015)Perspectives on Transactional Memory., and . CONCUR, volume 5710 of Lecture Notes in Computer Science, page 1-14. Springer, (2009)The Multikernel: A New OS Architecture for Scalable Multicore Systems, , , , , , , , and . SOSP '09: Proceedings of the ACM SIGOPS 22nd symposium on Operating systems principles, page 29--44. New York, NY, USA, ACM, (2009)WormBench: a configurable workload for evaluating transactional memory systems., , , , , , and . MEDEA@PACT, page 61-68. ACM, (2008)08241 Summary - Transactional Memory : From Implementation to Application., , , and . Transactional Memory: From Implementation to Application, volume 08241 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2008)08241 Abstracts Collection - Transactional Memory : From Implementation to Application., , , and . Transactional Memory: From Implementation to Application, volume 08241 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2008)Modeling memory bandwidth patterns on NUMA machines with performance counters., , and . CoRR, (2021)