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Statistical Framework and Built-In Self-Speed-Binning System for Speed Binning Using On-Chip Ring Oscillators., , , и . IEEE Trans. Very Large Scale Integr. Syst., 24 (5): 1675-1687 (2016)Generating Routing-Driven Power Distribution Networks With Machine-Learning Technique., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (8): 1237-1250 (2017)Test Generation for Defect-Based Faults of Scan Flip-Flops., , , , , и . VTS, стр. 1-7. IEEE, (2023)Predicting Vt variation and static IR drop of ring oscillators using model-fitting techniques., , , , , , , и . ASP-DAC, стр. 426-431. IEEE, (2017)Methodology of generating dual-cell-aware tests., , , , , , , и . VTS, стр. 1-6. IEEE Computer Society, (2017)Test Methodology for Defect-based Bridge Faults., , , , , , , , и . ITC-Asia, стр. 106-111. IEEE, (2020)Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax., , , , , и . ICCAD, стр. 116. ACM, (2016)Path-Based Pre-Routing Timing Prediction for Modern Very Large-Scale Integration Designs., , , , , , , , и . ISQED, стр. 1-6. IEEE, (2022)Rule Generation for Classifying SLT Failed Parts., , , , , и . VTS, стр. 1-7. IEEE, (2022)Predicting Vt mean and variance from parallel Id measurement with model-fitting technique., , , , , , , , , и . VTS, стр. 1-6. IEEE Computer Society, (2016)