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Array Placement for Storage Size Reduction in Embedded Multimedia Systems.

, , and . ASAP, page 66-75. IEEE Computer Society, (1997)

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Performance Through Hierarchy in Static Timing Verification., , and . IFIP Congress (1), volume A-12 of IFIP Transactions, page 703-709. North-Holland, (1992)Static Timing Analysis of Dynamically Sensitizable Paths., , and . DAC, page 568-573. ACM Press, (1989)Loop Optimization in Register-Transfer Scheduling for DSP-Systems., , and . DAC, page 826-831. ACM Press, (1989)An intelligent module generator environment., , , and . DAC, page 730-735. IEEE Computer Society Press, (1986)Solving large scale assignment problems in high-level synthesis by approximative quadratic programming., , , and . ACM Great Lakes Symposium on VLSI, page 19-24. ACM, (2001)Impact of technology scaling on substrate noise generation mechanisms mixed signal ICs., , , , , and . CICC, page 501-504. IEEE, (2004)Control flow optimization for fast system simulation and storage minimization., , , , and . EDAC-ETC-EUROASIC, page 20-24. IEEE Computer Society, (1994)Partial scan and symbolic test at the register-transfer level., , and . J. Electron. Test., 7 (1-2): 7-23 (1995)Efficient computation of symbol statistics from bit a priori information in turbo receivers., , , , and . IEEE Trans. Commun., 57 (7): 1889-1891 (2009)Reed-solomon codes implementing a coded single-carrier with cyclic prefix scheme., , and . IEEE Trans. Commun., 57 (4): 1031-1038 (2009)