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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.

Y. Zhang, Z. Sun, B. Liu, J. Qiu, D. Xu, Y. Zhang, X. Fu, D. You, H. Huang, W. Madany, A. Fadila, Z. Liu, W. Wang, Y. Xiong, A. Shirane, and K. Okada. IEEE J. Solid State Circuits, 59 (4): 993-1005 (April 2024)

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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.Y. Zhang, Z. Sun, B. Liu, J. Qiu, D. Xu, Y. Zhang, X. Fu, D. You, H. Huang, W. Madany and 6 other author(s). IEEE J. Solid State Circuits, 59 (4): 993-1005 (April 2024)Time-based recovery technique for pulse-position and pulse-amplitude modulation interface.W. Madany, M. Rashdan, and E. Hasaneen. ICM, page 277-280. IEEE, (2016)Serial data link interface for memory applications.W. Madany, M. Rashdan, and E. Hasaneen. MWSCAS, page 1-4. IEEE, (2016)A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter.Y. Zhang, Z. Sun, B. Liu, J. Qiu, D. Xu, Y. Zhang, X. Fu, D. You, H. Huang, W. Madany and 6 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference.D. Xu, Y. Zhang, H. Huang, Z. Sun, B. Liu, A. Fadila, J. Qiu, Z. Liu, W. Wang, Y. Xiong and 3 other author(s). CICC, page 1-2. IEEE, (2023)10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter.D. Xu, Z. Liu, Y. Kuai, H. Huang, Y. Zhang, Z. Sun, B. Liu, W. Wang, Y. Xiong, J. Qiu and 5 other author(s). ISSCC, page 192-194. IEEE, (2024)A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration.J. Qiu, W. Wang, Z. Sun, B. Liu, Y. Zhang, D. Xu, H. Huang, A. Fadila, Z. Liu, W. Madany and 3 other author(s). ISSCC, page 80-81. IEEE, (2023)A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path.W. Madany, Y. Zhang, A. Fadila, H. Huang, J. Qiu, A. Shirane, and K. Okada. ESSCIRC, page 265-268. IEEE, (2023)

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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.

Please choose a person to relate this publication to

Waleed Alsanie

Waleed Danho

Waleed Ajaj

Waleed Megahed

Waleed Wagealla

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Madany, Waleed"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.

Please choose a person to relate this publication to

Waleed Alsanie

Waleed Danho

Waleed Ajaj

Waleed Megahed

Waleed Wagealla

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.