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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang, T. Hsu, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, and M. Chang. ISSCC, page 494-496. IEEE, (2018)

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Hao Chen

Wei Chen

Other publications of authors with the same name

Novel Detection of Image Forgery for Exchanged Foreground and Background Using Image Watermarking Based on Alpha Matte.W. Hu, W. Chen, D. Huang, and C. Yang. ICGEC, page 245-248. IEEE, (2012)Automatic assessment of affective episodes for daily activities analysis.Y. Chiu, K. Huang, H. Chiu, and W. Chen. APSIPA, page 1-4. IEEE, (2014)A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories.A. Lee, H. Lee, F. Ebrahimi, B. Lam, W. Chen, M. Chang, P. Amiri, and K. Wang. IEEE Trans. Very Large Scale Integr. Syst., 26 (2): 272-279 (2018)A real-time spatiotemporal AI model analyzes skill in open surgical videos.E. Goodman, K. Patel, Y. Zhang, W. Locke, C. Kennedy, R. Mehrotra, S. Ren, M. Guan, M. Downing, H. Chen and 3 other author(s). CoRR, (2021)Confronting Ambiguity in 6D Object Pose Estimation via Score-Based Diffusion on SE(3).T. Hsiao, H. Chen, H. Yang, and C. Lee. CoRR, (2023)Low-Power Embedded DSP Core for Communication Systems.Y. Tsao, W. Chen, M. Tan, M. Lin, and S. Jou. EURASIP J. Adv. Signal Process., 2003 (13): 1355-1370 (2003)SurfNetv2: An Improved Real-Time SurfNet and Its Applications to Defect Recognition of Calcium Silicate Boards.C. Tsai, and H. Chen. Sensors, 20 (16): 4356 (2020)Location-routing problem with time-dependent demands.V. Yu, N. Normasari, and W. Chen. Comput. Ind. Eng., (2021)Novel Multi-view Synthesis from a Stereo Image Pair for 3D Display on Mobile Phone.C. Wei, C. Chiang, Y. Sun, M. Lin, and S. Lai. ACCV Workshops (2), volume 7729 of Lecture Notes in Computer Science, page 568-579. Springer, (2012)A Duty-Cycle Monitor Supporting A Wide Frequency Range of Clock Signal.C. Tsai, W. Chen, and S. Huang. ITC-Asia, page 1-6. IEEE, (2021)

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Disambiguation of "Chen, Wei-Hao"

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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

Please choose a person to relate this publication to

Hao Chen

Hao Chen

Hao Chen

Hao Chen

Wei Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Wei-Hao"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

Please choose a person to relate this publication to

Hao Chen

Hao Chen

Hao Chen

Hao Chen

Wei Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.