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MTJ based non-volatile flip-flop in deep submicron technology., , , , , и . ISOCC, стр. 424-427. IEEE, (2011)An MTJ-based non-volatile flip-flop for high-performance SoC., , , , , и . I. J. Circuit Theory and Applications, 42 (4): 394-406 (2014)Transistor sizing for reliable domino logic design in dual threshold voltage technologies., , и . ACM Great Lakes Symposium on VLSI, стр. 133-138. ACM, (2001)Low-swing clock domino logic incorporating dual supply and dual threshold voltages., , и . DAC, стр. 467-472. ACM, (2002)Pseudo NMOS based sense amplifier for high speed single-ended SRAM., , , , и . ICECS, стр. 331-334. IEEE, (2014)Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2748-2752 (2015)Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM., , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (10): 2413-2422 (2019)Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 752-765 (2015)A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface., , и . IEEE Trans. Consumer Electronics, 56 (4): 2400-2405 (2010)Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM., , , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1059-1063 (2016)