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Breaking Analog Locking Techniques via Satisfiability Modulo Theories., , , , , and . ITC, page 1-10. IEEE, (2019)Breaking Analog Locking Techniques., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (10): 2157-2170 (2020)Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction., , , , and . IEEE Trans. Emerg. Top. Comput., 10 (1): 386-403 (2022)Towards provably-secure analog and mixed-signal locking against overproduction., , , , and . ICCAD, page 7. ACM, (2018)Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (1): 36-41 (2021)Keynote: A Disquisition on Logic Locking., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 1952-1972 (2020)Securing Cloud FPGAs Against Power Side-Channel Attacks: A Case Study on Iterative AES., , , , and . CoRR, (2023)Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits., , , , , and . ITC, page 1-10. IEEE, (2020)