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Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks.

, , and . ITC, page 887-896. IEEE Computer Society, (1991)

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Challenges in code generation for embedded processors., , , , , , , and . Code Generation for Embedded Processors, page 48-64. Kluwer, (1994)Var-CNN and DynaFlow: Improved Attacks and Defenses for Website Fingerprinting., , , and . CoRR, (2018)Proof of Space from Stacked Expanders., and . TCC (B1), volume 9985 of Lecture Notes in Computer Science, page 262-285. (2016)RAW Path ORAM: A Low-Latency, Low-Area Hardware ORAM Controller with Integrity Verification., , , , , and . IACR Cryptology ePrint Archive, (2014)Beaver: A Decentralized Anonymous Marketplace with Secure Reputation., , , and . IACR Cryptology ePrint Archive, (2016)MARTHA: architecture for control and emulation of power electronics and smart grid systems., , , and . DATE, page 519-524. EDA Consortium San Jose, CA, USA / ACM DL, (2013)FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control., , and . CHES, volume 6917 of Lecture Notes in Computer Science, page 17-32. Springer, (2011)Effects of Memory Performance on Parallel Job Scheduling., , and . JSSPP, volume 2221 of Lecture Notes in Computer Science, page 116-132. Springer, (2001)Code density optimization for embedded DSP processors using data compression techniques., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (7): 601-608 (1998)Topological Optimization of Multiple-Level Array Logic., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (6): 915-941 (1987)