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CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.

Z. Yue, Y. Wang, H. Wang, Y. Wang, R. Guo, L. Tang, L. Liu, S. Wei, Y. Hu, and S. Yin. ISSCC, page 138-139. IEEE, (2023)

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Zhiheng He

Zhiheng Liu

Zhiheng Huang

Haidi Yue

Chaofang Yue

Other publications of authors with the same name

15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch.Z. Yue, X. Xiang, F. Tu, Y. Wang, Y. Wang, S. Wei, Y. Hu, and S. Yin. ISSCC, page 276-278. IEEE, (2024)CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.Z. Yue, Y. Wang, H. Wang, Y. Wang, R. Guo, L. Tang, L. Liu, S. Wei, Y. Hu, and S. Yin. ISSCC, page 138-139. IEEE, (2023)A Systolic Computing-in-Memory Array based Accelerator with Predictive Early Activation for Spatiotemporal Convolutions.X. Chen, R. Guo, Z. Yue, Y. Hu, L. Liu, S. Wei, and S. Yin. AICAS, page 1-5. IEEE, (2023)STAR: An STGCN ARchitecture for Skeleton-Based Human Action Recognition.W. Wu, F. Tu, M. Niu, Z. Yue, L. Liu, S. Wei, X. Li, Y. Hu, and S. Yin. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (6): 2370-2383 (2023)MC-CIM: a reconfigurable computation-in-memory for efficient stereo matching cost computation.Z. Yue, Y. Wang, L. Liu, S. Wei, and S. Yin. DAC, page 457-462. ACM, (2022)TT@CIM: A Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity Optimization and Variable Precision Quantization.R. Guo, Z. Yue, X. Si, H. Li, T. Hu, L. Tang, Y. Wang, H. Sun, L. Liu, M. Chang and 3 other author(s). IEEE J. Solid State Circuits, 58 (3): 852-866 (March 2023)BR-CIM: An Efficient Binary Representation Computation-In-Memory Design.Z. Yue, Y. Wang, Y. Qin, L. Liu, S. Wei, and S. Yin. IEEE Trans. Circuits Syst. I Regul. Pap., 69 (10): 3940-3953 (2022)20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models.R. Guo, L. Wang, X. Chen, H. Sun, Z. Yue, Y. Qin, H. Han, Y. Wang, F. Tu, S. Wei and 2 other author(s). ISSCC, page 362-364. IEEE, (2024)15.4 A 5.99-to-691.1TOPS/W Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity-Based Optimization and Variable-Precision Quantization.R. Guo, Z. Yue, X. Si, T. Hu, H. Li, L. Tang, Y. Wang, L. Liu, M. Chang, Q. Li and 2 other author(s). ISSCC, page 242-244. IEEE, (2021)34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications.Y. Wang, X. Yang, Y. Qin, Z. Zhao, R. Guo, Z. Yue, H. Han, S. Wei, Y. Hu, and S. Yin. ISSCC, page 566-568. IEEE, (2024)

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CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.

Please choose a person to relate this publication to

Zhiheng He

Zhiheng Liu

Zhiheng Huang

Haidi Yue

Chaofang Yue

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yue, Zhiheng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.

Please choose a person to relate this publication to

Zhiheng He

Zhiheng Liu

Zhiheng Huang

Haidi Yue

Chaofang Yue

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.