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MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes.

, , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1237-1250 (2018)

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A practical split manufacturing framework for Trojan prevention via simultaneous wire lifting and cell insertion., , , , , and . ASP-DAC, page 265-270. IEEE, (2018)Analytical Heterogeneous Die-to-Die 3D Placement with Macros., , , , , and . CoRR, (2024)Data Efficient Lithography Modeling with Transfer Learning and Active Data Selection., , , , , , and . CoRR, (2018)High performance dummy fill insertion with coupling and uniformity constraints., , and . DAC, page 71:1-71:6. ACM, (2015)DSAR: DSA aware Routing with Simultaneous DSA Guiding Pattern and Double Patterning Assignment., , , , , and . ISPD, page 91-98. ACM, (2017)Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks., , , , , and . ASP-DAC, page 152-157. ACM, (2021)CircuitNet: An Open-Source Dataset for Machine Learning in VLSI CAD Applications With Improved Domain-Specific Evaluation Metric and Learning Strategies., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (12): 5034-5047 (December 2023)Adaptive Layout Decomposition With Graph Embedding Neural Networks., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 5030-5042 (2022)FastGR: Global Routing on CPU-GPU With Heterogeneous Task Graph Scheduler., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (7): 2317-2330 (July 2023)Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (2): 641-653 (February 2024)