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Disambiguation of "Xie, Yuan"

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NNBench-X: Benchmarking and Understanding Neural Network Workloads for Accelerator Designs.

, , , , , and . IEEE Comput. Archit. Lett., 18 (1): 38-42 (2019)

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Jian Xie

Yangpei Xie

Mingliang Xie

Qian Xie

Zhenwei Xie

 

Other publications of authors with the same name

RADAR: a 3D-reRAM based DNA alignment accelerator architecture., , , and . DAC, page 59:1-59:6. ACM, (2018)Guest Editorial., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (4): 485-486 (2013)Multi-objective Optimization of Fuzzy Parallel Machines Scheduling Problem Using Nondominated Genetic Algorithms.. J. Softw., 6 (10): 2036-2042 (2011)3D-SWIFT: a high-performance 3D-stacked wide IO DRAM., , , , and . ACM Great Lakes Symposium on VLSI, page 51-56. ACM, (2014)K-Hyperline Clustering-Based Color Image Segmentation Robust to Illumination Changes., , , , and . Symmetry, 10 (11): 610 (2018)Taming Unstructured Sparsity on GPUs via Latency-Aware Optimization., and . DAC, page 1-6. IEEE, (2020)Parana: A Parallel Neural Architecture Considering Thermal Problem of 3D Stacked Memory., , , , , , , , , and 1 other author(s). IEEE Trans. Parallel Distributed Syst., 30 (1): 146-160 (2019)Image captioning via hierarchical attention mechanism and policy gradient optimization., , , , , and . Signal Process., (2020)Exploring memory controller configurations for many-core systems with 3D stacked DRAMs., , , and . ISQED, page 565-570. IEEE, (2015)Crosstalk-Aware Energy Efficient Encoding for Instruction Bus through Code Compression., and . SoCC, page 193-196. IEEE, (2006)