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Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures., , , , , , , , , и . VLSI Signal Processing, 9 (1-2): 49-65 (1995)System-Level Data-Flow Transformation Exploration and Power-Area Trade-offs Demonstrated on Video Codecs., , , и . VLSI Signal Processing, 18 (1): 39-50 (1998)Nonlinear transformations for high level regular array ASIC synthesis., , и . VLSI Signal Processing, 4 (4): 259-268 (1992)Performance Through Hierarchy in Static Timing Verification., , и . IFIP Congress (1), том A-12 из IFIP Transactions, стр. 703-709. North-Holland, (1992)Static Timing Analysis of Dynamically Sensitizable Paths., , и . DAC, стр. 568-573. ACM Press, (1989)Loop Optimization in Register-Transfer Scheduling for DSP-Systems., , и . DAC, стр. 826-831. ACM Press, (1989)Solving large scale assignment problems in high-level synthesis by approximative quadratic programming., , , и . ACM Great Lakes Symposium on VLSI, стр. 19-24. ACM, (2001)An intelligent module generator environment., , , и . DAC, стр. 730-735. IEEE Computer Society Press, (1986)Advanced Data Layout Optimization for Multimedia Applications., , и . IPDPS Workshops, том 1800 из Lecture Notes in Computer Science, стр. 186-193. Springer, (2000)Reasoning About a Class of Linear Systems of Equations in HOL., , и . TPHOLs, том 859 из Lecture Notes in Computer Science, стр. 33-48. Springer, (1994)