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Global Routing., and . Encyclopedia of Algorithms, (2016)Machine learning for IC design and technology co-optimization in extreme scaling.. VLSI-DAT, page 1. IEEE, (2018)A High-Performance Triple Patterning Layout Decomposer with Balanced Density., , , , , and . CoRR, (2014)EPIC: Efficient prediction of IC manufacturing hotspots with a unified meta-classification formulation., , , and . CoRR, (2014)A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 55 (12): 3248-3259 (2020)An OTA-Less Second-Order VCO-Based CT $\Delta\Sigma$ Modulator Using an Inherent Passive Integrator and Capacitive Feedback., , and . IEEE J. Solid State Circuits, 55 (5): 1337-1350 (2020)A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier., , , , , , and . IEEE J. Solid State Circuits, 58 (9): 2564-2574 (September 2023)On stress aware active area sizing, gate sizing, and repeater insertion., and . ISPD, page 35-42. ACM, (2009)PASAP: power aware structured ASIC placement., and . ISLPED, page 395-400. ACM, (2010)AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection., , , and . DAC, page 795-800. ACM, (2011)