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DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory.

C. Duan, J. Yang, X. He, Y. Qi, Y. Wang, Y. Wang, Z. He, B. Yan, X. Wang, X. Jia, W. Pan, and W. Zhao. CoRR, (2023)

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Yang Yang

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Fast vectorless power grid verification using maximum voltage drop location estimation.W. Zhao, Y. Cai, and J. Yang. ASP-DAC, page 861-866. IEEE, (2014)PowerRush: An Efficient Simulator for Static Power Grid Analysis.J. Yang, Z. Li, Y. Cai, and Q. Zhou. IEEE Trans. Very Large Scale Integr. Syst., 22 (10): 2103-2116 (2014)Friendly Fast Poisson Solver Preconditioning Technique for Power Grid Analysis.J. Yang, Y. Cai, Q. Zhou, and J. Shi. IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 899-912 (2014)Optimized Integer Aperture Bootstrapping for High-Integrity CDGNSS Applications.J. Zhao, P. Huang, B. Yu, L. Wang, Y. Wang, C. Sheng, Q. Yi, and J. Yang. Remote. Sens., 16 (1): 118 (January 2024)S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks.J. Yang, W. Fu, X. Cheng, X. Ye, P. Dai, and W. Zhao. CoRR, (2021)Spintronic Memristor as Interface Between DNA and Solid State Devices.J. Yang, Z. Sun, X. Wang, Y. Chen, and H. Li. IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (2): 212-221 (2016)ODESY: a novel 3T-3MTJ cell design with optimized area DEnsity, scalability and latencY.L. Xue, Y. Cheng, J. Yang, P. Wang, and Y. Xie. ICCAD, page 118. ACM, (2016)Lossy and Lossless (L2) Post-training Model Size Compression.Y. Shi, S. Bai, X. Wei, R. Gong, and J. Yang. ICCV, page 17500-17510. IEEE, (2023)Power supply noise aware evaluation framework for side channel attacks and countermeasures.J. Yang, C. Wang, Y. Cai, and Q. Zhou. FPT, page 161-166. IEEE, (2014)Power Profile Equalizer: A Lightweight Countermeasure against Side-Channel Attack.C. Wang, M. Yan, Y. Cai, Q. Zhou, and J. Yang. ICCD, page 305-312. IEEE Computer Society, (2017)

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Disambiguation of "Yang, Jianlei"

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DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Jianlei"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
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DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory.