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Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors.

, , , , and . ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)

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PRR: A low-overhead cache replacement algorithm for embedded processors., , , , and . ASP-DAC, page 35-40. IEEE, (2012)QoS for Networked Heterogeneous Real-Time Embedded Systems., , , , , and . PDCCS, page 135-140. ISCA, (2008)Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory., , , , , and . FPL, page 459-462. IEEE, (2008)Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling., , , , , and . IEEE Trans. Signal Process., 60 (6): 3253-3263 (2012)Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (4): 584-592 (2011)Memory access schedule minimization for embedded systems., , , , , and . J. Syst. Archit., 58 (1): 48-59 (2012)Optimizing Data Allocation and Memory Configuration for Non-Volatile Memory Based Hybrid SPM on Embedded CMPs., , , , and . IPDPS Workshops, page 982-989. IEEE Computer Society, (2012)Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories., , , , , and . IEEE Trans. Computers, 63 (8): 2039-2051 (2014)Data Allocation Optimization for Hybrid Scratch Pad Memory With SRAM and Nonvolatile Memory., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (6): 1094-1102 (2013)Write activity reduction on non-volatile main memories for embedded chip multiprocessors., , , , and . ACM Trans. Embed. Comput. Syst., 12 (3): 77:1-77:27 (2013)